517 lines
17 KiB
C++
517 lines
17 KiB
C++
#pragma once
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// =================================================================================================
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// General Registers (p.23)
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// =================================================================================================
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#define REG_ADDR_GENERAL_GCONF 0x00
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#define REG_ADDR_GENERAL_GSTAT 0x01
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#define REG_ADDR_GENERAL_IFCNT 0x02
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#define REG_ADDR_GENERAL_NODECONF 0x03
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#define REG_ADDR_GENERAL_OTP_PROG 0x04
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#define REG_ADDR_GENERAL_OTP_READ 0x05
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#define REG_ADDR_GENERAL_IOIN 0x06
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#define REG_ADDR_GENERAL_FACTORY_CONF 0x07
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/// @brief Global configuration flags
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struct REG_GCONF {
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/**
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* (Reset default=1)
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* 0: Use internal reference derived from 5VOUT
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* 1: Use voltage supplied to VREF as current reference
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*/
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unsigned int I_scale_analog: 1;
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/**
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* (Reset default: OTP)
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* 0: Operation with external sense resistors
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* 1: Internal sense resistors. Use current supplied into VREF as reference for internal sense resistor. VREF pin internally is driven to GND in this mode.
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*/
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unsigned int internal_Rsense: 1;
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/**
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* (Reset default: OTP)
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* 0: StealthChop PWM mode enabled (depending on velocity thresholds). Initially switch from off to on state while in stand still, only.
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* 1: SpreadCycle mode enabled A high level on the pin SPREAD inverts this flag to switch between both chopper modes.
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*/
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unsigned int en_SpreadCycle: 1;
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/**
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* 1: Inverse motor direction
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*/
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unsigned int shaft: 1;
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/**
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* 0: INDEX shows the first microstep position of sequencer
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* 1: INDEX pin outputs overtemperature prewarning flag (otpw) instead
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*/
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unsigned int index_otpw: 1;
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/**
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* 0: INDEX output as selected by index_otpw
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* 1: INDEX output shows step pulses from internal pulse generator (toggle upon each step)
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*/
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unsigned int index_step: 1;
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/**
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* 0: PDN_UART controls standstill current reduction
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* 1: PDN_UART input function disabled. Set this bit, when using the UART interface!
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*/
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unsigned int pdn_disable: 1;
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/**
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* 0: Microstep resolution selected by pins MS1, MS2
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* 1: Microstep resolution selected by MRES register
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*/
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unsigned int mstep_reg_select: 1;
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/**
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* 0: No filtering of STEP pulses
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* 1: Software pulse generator optimization enabled when fullstep frequency > 750Hz (roughly). TSTEP shows filtered step time values when active
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*/
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unsigned int multistep_filt: 1;
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/**
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* 0: Normal operation
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* 1: Enable analog test output on pin ENN (pull down resistor off), ENN treated as enabled. IHOLD[1..0] selects the function of DCO: 0…2: T120, DAC, VDDH
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*/
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unsigned int test_mode: 1;
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unsigned int :22;
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};
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/// @brief Global status flags
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struct REG_GSTAT {
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/**
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* 1: Indicates that the IC has been reset since the last read access to GSTAT. All registers have been cleared to reset values.
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*/
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unsigned int reset: 1;
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/**
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* 1: Indicates, that the driver has been shut down due to overtemperature or short circuit detection since the last read access. Read DRV_STATUS for details. The flag can only be cleared when all error conditions are cleared
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*/
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unsigned int drv_err: 1;
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/**
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* Indicates an undervoltage on the charge pump. The driver is disabled in this case. This flag is not latched and thus does not need to be cleared
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*/
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unsigned int uv_cp: 1;
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unsigned int :29;
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};
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/// @brief Interface transmission counter
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struct REG_IFCNT {
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/**
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* Interface transmission counter. This register becomes incremented with each successful UART interface write access. Read out to check the serial transmission for lost data. Read accesses do not change the content. The counter wraps around from 255 to 0.
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*/
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unsigned int mstep: 8;
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unsigned int :24;
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};
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/// @brief Node configuration
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struct REG_NODECONF {
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unsigned int :8;
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/**
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* SENDDELAY for read access (time until reply is sent):
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* 0, 1: 8 bit times (Attention: Don’t use in multi-node)
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* 2, 3: 3*8 bit times
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* 4, 5: 5*8 bit times
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* 6, 7: 7*8 bit times
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* 8, 9: 9*8 bit times
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* 10, 11: 11*8 bit times
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* 12, 13: 13*8 bit times
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* 14, 15: 15*8 bit times
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*/
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unsigned int senddelay: 4;
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unsigned int :16;
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};
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/// @brief OTP programming
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struct REG_OPT_PROG {
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/**
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* Selection of OTP bit to be programmed to the selected byte location (n=0..7: programs bit n to a logic 1)
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*/
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unsigned int otpbit: 3;
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/**
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* Selection of OTP programming location (0, 1 or 2)
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*/
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unsigned int optbyte: 1;
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/**
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* Set to 0xbd to enable programming. A programming time of minimum 10ms per bit is recommended (check by reading OTP_READ).
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*/
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unsigned int optmagic: 8;
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unsigned int :16;
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};
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/// @brief OTP read (Access to OTP memory result and update)
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struct OTP_READ {
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/// @brief OTP0 byte 0 read data
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unsigned int opt0: 8;
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/// @brief OTP1 byte 1 read data
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unsigned int opt1: 8;
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/// @brief OTP2 byte 2 read data
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unsigned int opt2: 8;
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unsigned int :8;
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};
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/// @brief Inputs (Reads the state of all input pins available)
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struct REG_IOIN {
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unsigned int enn: 1;
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unsigned int :1;
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unsigned int ms1: 1;
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unsigned int ms2: 1;
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unsigned int diag: 1;
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unsigned int :1;
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unsigned int pdn_uart: 1;
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unsigned int step: 1;
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unsigned int spread_en: 1;
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unsigned int dir: 1;
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/**
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* @brief VERSION: 0x21=first version of the IC Identical numbers mean full digital compatibility.
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*/
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unsigned int version: 8;
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};
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struct REG_FACTORY_CONF {
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/**
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* Lowest to highest clock frequency. Check at charge pump output. The frequency span is not guaranteed, but it is tested, that tuning to 12MHz internal clock is possible. The devices come preset to 12MHz clock frequency by OTP programming.
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*/
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unsigned int fclktrim: 5;
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/**
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* %00: OT=143°C, OTPW=120°C
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* %01: OT=150°C, OTPW=120°C
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* %10: OT=150°C, OTPW=143°C
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* %11: OT=157°C, OTPW=143°C
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*/
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unsigned int ottrim: 2;
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unsigned int :25;
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};
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// =================================================================================================
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// Velocity Dependent Control (p.28)
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// =================================================================================================
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#define REG_ADDR_VELOCITY_IHOLD_IRUN 0x10
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#define REG_ADDR_VELOCITY_TPOWERDOWN 0x11
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#define REG_ADDR_VELOCITY_TSTEP 0x12
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#define REG_ADDR_VELOCITY_TPWMTHRS 0x13
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#define REG_ADDR_VELOCITY_VACTUAL 0x22
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/// @brief Driver current control
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struct REG_IHOLD_IRUN {
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/**
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* (Reset default: OTP)
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* IHOLD (Reset default: OTP)
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* Standstill current (0=1/32 … 31=32/32)
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* In combination with StealthChop mode, setting
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* IHOLD=0 allows to choose freewheeling or coil short circuit (passive braking) for motor stand still.
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*/
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unsigned int ihold: 5;
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/**
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* (Reset default=31)
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* Motor run current (0=1/32 … 31=32/32)
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*
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* Tint: Choose sense resistors in a way, that normal IRUN is 16 to 31 for best microstep performance.
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*/
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unsigned int irun: 5;
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/**
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* (Reset default: OTP)
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* Controls the number of clock cycles for motor power down after standstill is detected (stst=1) and TPOWERDOWN has expired. The smooth transition avoids a motor jerk upon power down.
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* 0: instant power down
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* 1..15: Delay per current reduction step in multiple of 2^18 clocks
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*/
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unsigned int iholddelay: 4;
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unsigned int :18;
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};
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struct REG_TPOWERDOWN {
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/**
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* (Reset default=20)
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* Sets the delay time from stand still (stst) detection to motor current power down. Time range is about 0 to 5.6 seconds.
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* 0…((2^8)-1) * 2^18 tCLK
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* Attention: A minimum setting of 2 is required to allow automatic tuning of StealthChop PWM_OFFS_AUTO.
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*/
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unsigned int tpow: 8;
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unsigned int :24;
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};
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/// @brief Time between two 1/256 microsteps
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struct REG_TSTEP {
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/**
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* Actual measured time between two 1/256 microsteps derived from the step input frequency in units of 1/fCLK. Measured value is (2^20)-1 in case of overflow or stand still. TSTEP always relates to 1/256 step, independent of the actual MRES. The TSTEP related threshold uses a hysteresis of 1/16 of the compare value to compensate for jitter in the clock or the step frequency: (Txxx*15/16)-1 is the lower compare value for each TSTEP based comparison.
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* This means, that the lower switching velocity equals the calculated setting, but the upper switching velocity is higher as defined by the hysteresis setting.
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*
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*/
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unsigned int tstep: 20;
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unsigned int :12;
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};
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/// @brief Upper velocity for StealthChop voltage PWM mode
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struct REG_TPWMTHRS {
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/**
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* Sets the upper velocity for StealthChop voltage PWM mode.
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* TSTEP ≥ TPWMTHRS
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* - StealthChop PWM mode is enabled, if configured
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* When the velocity exceeds the limit set by TPWMTHRS, the driver switches to SpreadCycle.
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* 0: Disabled
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*/
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unsigned int tpwmthrs: 20;
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unsigned int :12;
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};
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struct REG_VACTUAL {
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/**
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* ACTUAL allows moving the motor by UART control.
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* It gives the motor velocity in +-(2^23)-1 [μsteps / t]
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* 0: Normal operation. Driver reacts to STEP input.
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* !=0: Motor moves with the velocity given by VACTUAL. Step pulses can be monitored via INDEX output. The motor direction is controlled by the sign of VACTUAL.
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*/
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int vactual: 24;
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unsigned int :8;
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};
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// =================================================================================================
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// StallGuard (p.29)
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// =================================================================================================
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#define REG_ADDR_STALLGUARD_TCOOLTHRS 0x14
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#define REG_ADDR_STALLGUARD_SGTHRS 0x40
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#define REG_ADDR_STALLGUARD_SG_RESULT 0x41
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#define REG_ADDR_STALLGUARD_COOLCONF 0x42
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struct REG_TCOOLTHRS {
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/**
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* This is the lower threshold velocity for switching on smart energy CoolStep and StallGuard to DIAG output. (unsigned) Set this parameter to disable CoolStep at low speeds, where it cannot work reliably. The stall output signal become enabled when exceeding this velocity. It becomes disabled again once the velocity falls below this threshold.
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* TCOOLTHRS ≥ TSTEP > TPWMTHRS
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* - CoolStep is enabled, if configured (only with StealthChop)
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* - Stall output signal on pin DIAG is enabled
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*/
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unsigned int tcoolthrs: 20;
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unsigned int :12;
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};
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struct REG_SGTHRS {
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/**
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* Detection threshold for stall. The StallGuard value SG_RESULT becomes compared to the double of this threshold. A stall is signaled with
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* SG_RESULT ≤ SGTHRS*2
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*/
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unsigned int sgthrs: 8;
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unsigned int :24;
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};
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struct REG_SG_RESULT {
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/**
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* StallGuard result. SG_RESULT becomes updated with each fullstep, independent of TCOOLTHRS and SGTHRS. A higher value signals a lower motor load and more torque headroom. Intended for StealthChop mode, only. Bits 9 and 0 will always show 0. Scaling to 10 bit is for compatibility to StallGuard2
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*/
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unsigned int sg_result: 10;
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unsigned int :22;
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};
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struct REG_COOLCONF {
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/**
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* @brief CoolStep configuration
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*/
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unsigned int coolconf: 16;
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unsigned int :16;
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};
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// =================================================================================================
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// Sequencer Registers (p.30)
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// =================================================================================================q
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#define REG_ADDR_SEQUENCER_MSCNT 0x6A
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#define REG_ADDR_SEQUENCER_MSCURACT 0x6B
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/// @brief Microstep counter
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struct REG_MSCNT {
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/**
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* Microstep counter. Indicates actual position in the microstep table for CUR_A. CUR_B uses an offset of 256 into the table. Reading out MSCNT allows determination of the motor position within the electrical wave.
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*/
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unsigned int mscnt: 10;
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unsigned int :22;
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};
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/// @brief Microstep current (actual)
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struct REG_MSCURACT {
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/**
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* Actual microstep current for motor phase B (sine wave) as read from the internal sine wave table (not scaled by current setting)
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*/
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int cur_a: 9;
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/**
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* Actual microstep current for motor phase A (co-sine wave) as read from the internal sine wave table (not scaled by current setting)
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*/
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int cur_b: 9;
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unsigned int :14;
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};
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// =================================================================================================
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// Chopper Registers (p.32)
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// =================================================================================================
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#define REG_ADDR_CHOPPER_CHOPCONF 0x6C
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#define REG_ADDR_CHOPPER_DRV_STATUS 0x6F
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#define REG_ADDR_CHOPPER_PWMCONF 0x70
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#define REG_ADDR_CHOPPER_PWM_SCALE 0x71
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#define REG_ADDR_CHOPPER_PWM_AUTO 0x72
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struct REG_CHOPCONF {
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/**
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* @brief off time and driver enable
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* Off time setting controls duration of slow decay phase
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* NCLK= 24 + 32*TOFF
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* %0000: Driver disable, all bridges off
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* %0001: 1 – use only with TBL ≥ 2
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* %0010 ... %1111: 2 ... 15
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* (Default: OTP, resp. 3 in StealthChop mode)
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*/
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unsigned int toff: 4;
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/**
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* @brief hysteresis start value added to HEND
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* %000 ... %111:
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* Add 1, 2, ..., 8 to hysteresis low value HEND
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* (1/512 of this setting adds to current setting)
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* Attention: Effective HEND+HSTRT ≤ 16.
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* Hint: Hysteresis decrement is done each 16 clocks
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*/
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unsigned int hstrt: 3;
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/**
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* @brief HEND hysteresis low value OFFSET sine wave offset
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* %0000 ... %1111:
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* Hysteresis is -3, -2, -1, 0, 1, ..., 12
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* (1/512 of this setting adds to current setting)
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* This is the hysteresis value which becomes used for the hysteresis chopper.
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* (Default: OTP, resp. 0 in StealthChop mode)
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*/
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unsigned int hend: 4;
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unsigned int :1;
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/**
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* @brief TBL blank time select
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* %00 ... %11:
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* Set comparator blank time to 16, 24, 32 or 40 clocks
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* Hint: %00 or %01 is recommended for most applications
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* (Default: OTP)
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*/
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unsigned int tbl: 2;
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/**
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* @brief sense resistor voltage based current scaling
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* 0: Low sensitivity, high sense resistor voltage
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* 1: High sensitivity, low sense resistor voltage
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*/
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unsigned int vsense: 1;
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unsigned int :6;
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/**
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* @brief micro step resolution
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* %0000: Native 256 microstep setting.
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* %0001 ... %1000:
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* 128, 64, 32, 16, 8, 4, 2, FULLSTEP
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* Reduced microstep resolution.
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* The resolution gives the number of microstep entries per sine quarter wave.
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* When choosing a lower microstep resolution, the driver automatically uses microstep positions which result in a symmetrical wave.
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* Number of microsteps per step pulse = 2^MRES (Selection by pins unless disabled by GCONF. mstep_reg_select)
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*/
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unsigned int mres: 4;
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/**
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* @brief interpolation to 256 microsteps
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* 1: The actual microstep resolution (MRES) becomes extrapolated to 256 microsteps for smoothest motor operation. (Default: 1)
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*/
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unsigned int intpol: 1;
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/**
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* @brief enable double edge step pulses
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* 1: Enable step impulse at each step edge to reduce step frequency requirement. This mode is not compatible with the step filtering function (multistep_filt)
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*/
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unsigned int dedge: 1;
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/**
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* @brief short to GND protection disable
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* 0: Short to GND protection is on
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* 1: Short to GND protection is disabled
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*/
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unsigned int diss2g: 1;
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/**
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* @brief Low side short protection disable
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* 0: Short protection low side is on
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* 1: Short protection low side is disabled
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*/
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unsigned int diss2vs: 1;
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};
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struct DRV_STATUS {
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unsigned int drv_status: 32;
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};
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struct PWMCONF {
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unsigned int pwmconf: 22;
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unsigned int :10;
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};
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/**
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* Results of StealthChop amplitude regulator. These values can be used to monitor automatic PWM amplitude scaling (255=max. voltage).
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*/
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struct PWM_SCALE {
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/**
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* Actual PWM duty cycle. This value is used for scaling the values CUR_A and CUR_B read from the sine wave table.
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*/
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unsigned int pwm_scale_sum: 8;
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/**
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* 9 Bit signed offset added to the calculated PWM duty cycle. This is the result of the automatic amplitude regulation based on current measurement.
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*/
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unsigned int pwm_scale_auto: 9;
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unsigned int :15;
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};
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/**
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* These automatically generated values can be read out in order to determine a default / power up setting for PWM_GRAD and PWM_OFS.
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*/
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struct PWM_AUTO {
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/**
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* Automatically determined offset value
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*/
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unsigned int pwm_ofs_auto: 8;
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/**
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* Automatically determined gradient value
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*/
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unsigned int pwm_grad_auto: 8;
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unsigned int :16;
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}; |