Squashed commit of the following:

commit c6fd825e39
Author: AlexanderHD27 <alexander@hal>
Date:   Wed Nov 6 23:14:14 2024 +0100

    Moved CAN Interface code to comment libary folder with symlink

commit e7a0035041
Author: AlexanderHD27 <alexander@hal>
Date:   Wed Nov 6 22:01:28 2024 +0100

    Got MCP2521 to work

commit 4bfb1f533e
Author: AlexanderHD27 <alexander@hal>
Date:   Wed Oct 16 21:29:35 2024 +0200

    Did something to YGantryMount. It works. trust me

commit 5683168a47
Author: AlexanderHD27 <alexander@hal>
Date:   Wed Oct 16 21:28:36 2024 +0200

    Implemented Command-Level Interaction with CAN Interface

commit 9c0c676be8
Author: AlexanderHD27 <alexander@hal>
Date:   Mon Oct 14 09:20:37 2024 +0200

    Added Vscode Profile file

commit b150a905a3
Author: AlexanderHD27 <alexander@hal>
Date:   Mon Oct 14 09:19:00 2024 +0200

    Implemented Low Level Compunications

commit 7eebf619ae
Author: AlexanderHD27 <alexander@hal>
Date:   Mon Oct 7 14:46:15 2024 +0200

    Created Head Pipe Mount

commit 93c40e1805
Author: AlexanderHD27 <alexander@hal>
Date:   Mon Oct 7 14:44:11 2024 +0200

    First Revision of YGantryMount

commit 91c2125458
Author: AlexanderHD27 <alexander@hal>
Date:   Thu Oct 3 19:52:37 2024 +0200

    Added Kicad Backups 2 gitignore

commit 096a6c18d6
Author: AlexanderHD27 <alexander@hal>
Date:   Thu Oct 3 19:49:21 2024 +0200

    Created ESP-IDF for can-interface

commit 48fded7981
Author: AlexanderHD27 <alexander@hal>
Date:   Sat Sep 28 19:54:29 2024 +0200

    Added files from Pico sdk to gitignore

commit ec5e5cbf13
Author: AlexanderHD27 <alexander@hal>
Date:   Sat Sep 14 21:09:50 2024 +0200

    Create Marker for position Calibration

commit 58d31964b2
Author: AlexanderHD27 <alexander@hal>
Date:   Wed Sep 11 23:32:55 2024 +0200

    Upgrade to pico SDK 2.0.0
This commit is contained in:
AlexanderHD27
2024-11-06 23:18:12 +01:00
parent f002a01308
commit e091d4df18
49 changed files with 3905 additions and 0 deletions

View File

@@ -0,0 +1,177 @@
#pragma once
#include <cstdint>
/**
* @brief RXnBF PIN CONTROL AND STATUS REGISTER (ADDRESS: 0Ch)
*
*/
struct BFPCTRL {
uint8_t B0BFM : 1;
uint8_t B1BFM : 1;
uint8_t B0BFE : 1;
uint8_t B1BFE : 1;
uint8_t B0BFS : 1;
uint8_t B1BFS : 1;
uint8_t : 2;
};
/**
* @brief TXnRTS PIN CONTROL AND STATUS REGISTER
*
*/
struct TXRTSCTRL {
uint8_t B0RTSM : 1;
uint8_t B1RTSM : 1;
uint8_t B2RTSM : 1;
uint8_t B0RTS : 1;
uint8_t B1RTS : 1;
uint8_t B2RTS : 1;
uint8_t : 2;
};
struct CANSTAT {
uint8_t ICOD0 : ;
uint8_t : 1;
uint8_t OPMOD0 : 1;
uint8_t OPMOD1 : 1;
uint8_t OPMOD2 : 1;
uint8_t : 1;
};
struct CANCTRL {
uint8_t CLKPRE0 : 1;
uint8_t CLKPRE1 : 1;
uint8_t CLKEN : 1;
uint8_t OSM : 1;
uint8_t ABAT : 1;
uint8_t REQOP0 : 1;
uint8_t REQOP1 : 1;
uint8_t REQOP2 : 1;
};
struct TEC {
uint8_t TEC;
};
struct REC {
uint8_t REC;
};
struct CNF3 {
uint8_t PHSEG20 : 1;
uint8_t PHSEG21 : 1;
uint8_t PHSEG22 : 1;
uint8_t : 3;
uint8_t WAKFIL : 1;
uint8_t SOF : 1;
};
struct CNF2 {
uint8_t PRSEG0 : 1;
uint8_t PRSEG1 : 1;
uint8_t PRSEG2 : 1;
uint8_t PHSEG10 : 1;
uint8_t PHSEG11 : 1;
uint8_t PHSEG12 : 1;
uint8_t SAM : 1;
uint8_t BTLMODE : 1;
};
struct CNF1 {
uint8_t BRP0 : 1;
uint8_t BRP1 : 1;
uint8_t BRP2 : 1;
uint8_t BRP3 : 1;
uint8_t BRP4 : 1;
uint8_t BRP5 : 1;
uint8_t SJW0 : 1;
uint8_t SJW1 : 1;
};
struct CANINTE {
uint8_t RX0IE : 1;
uint8_t RX1IE : 1;
uint8_t TX0IE : 1;
uint8_t TX1IE : 1;
uint8_t TX2IE : 1;
uint8_t ERRIE : 1;
uint8_t WAKIE : 1;
uint8_t MERRE : 1;
};
struct CANINTF {
uint8_t RX0IF : 1;
uint8_t RX1IF : 1;
uint8_t TX0IF : 1;
uint8_t TX1IF : 1;
uint8_t TX2IF : 1;
uint8_t ERRIF : 1;
uint8_t WAKIF : 1;
uint8_t MERRF : 1;
};
struct EFLG {
uint8_t EWARN : 1;
uint8_t RXWAR : 1;
uint8_t TXWAR : 1;
uint8_t RXEP : 1;
uint8_t TXEP : 1;
uint8_t TXBO : 1;
uint8_t RX0OVR : 1;
uint8_t RX1OVR : 1;
};
struct TXB0CTRL {
uint8_t TXP0 : 1;
uint8_t TXP1 : 1;
uint8_t : 1;
uint8_t TXREQ : 1;
uint8_t TXERR : 1;
uint8_t MLOA : 1;
uint8_t ABTF : 1;
uint8_t : 1;
};
struct TXB1CTRL {
uint8_t TXP0 : 1;
uint8_t TXP1 : 1;
uint8_t : 1;
uint8_t TXREQ : 1;
uint8_t TXERR : 1;
uint8_t MLOA : 1;
uint8_t ABTF : 1;
uint8_t : 1;
};
struct TXB2CTRL {
uint8_t TXP0 : 1;
uint8_t TXP1 : 1;
uint8_t : 1;
uint8_t TXREQ : 1;
uint8_t TXERR : 1;
uint8_t MLOA : 1;
uint8_t ABTF : 1;
uint8_t : 1;
};
struct RXB0CTRL {
uint8_t FILHIT0 : 1;
uint8_t BUKT1 : 1;
uint8_t BUKT : 1;
uint8_t RXRTR : 1;
uint8_t : 1;
uint8_t RXM0 : 1;
uint8_t RXM1 : 1;
uint8_t : 1;
};
struct RXB1CTRL {
uint8_t FILHIT0 : 1;
uint8_t FILHIT1 : 1;
uint8_t FILHIT2 : 1;
uint8_t RXRTR : 1;
uint8_t : 1;
uint8_t RXM0 : 1;
uint8_t RXM1 : 1;
uint8_t : 1;
};