Squashed commit of the following:
commitc6fd825e39Author: AlexanderHD27 <alexander@hal> Date: Wed Nov 6 23:14:14 2024 +0100 Moved CAN Interface code to comment libary folder with symlink commite7a0035041Author: AlexanderHD27 <alexander@hal> Date: Wed Nov 6 22:01:28 2024 +0100 Got MCP2521 to work commit4bfb1f533eAuthor: AlexanderHD27 <alexander@hal> Date: Wed Oct 16 21:29:35 2024 +0200 Did something to YGantryMount. It works. trust me commit5683168a47Author: AlexanderHD27 <alexander@hal> Date: Wed Oct 16 21:28:36 2024 +0200 Implemented Command-Level Interaction with CAN Interface commit9c0c676be8Author: AlexanderHD27 <alexander@hal> Date: Mon Oct 14 09:20:37 2024 +0200 Added Vscode Profile file commitb150a905a3Author: AlexanderHD27 <alexander@hal> Date: Mon Oct 14 09:19:00 2024 +0200 Implemented Low Level Compunications commit7eebf619aeAuthor: AlexanderHD27 <alexander@hal> Date: Mon Oct 7 14:46:15 2024 +0200 Created Head Pipe Mount commit93c40e1805Author: AlexanderHD27 <alexander@hal> Date: Mon Oct 7 14:44:11 2024 +0200 First Revision of YGantryMount commit91c2125458Author: AlexanderHD27 <alexander@hal> Date: Thu Oct 3 19:52:37 2024 +0200 Added Kicad Backups 2 gitignore commit096a6c18d6Author: AlexanderHD27 <alexander@hal> Date: Thu Oct 3 19:49:21 2024 +0200 Created ESP-IDF for can-interface commit48fded7981Author: AlexanderHD27 <alexander@hal> Date: Sat Sep 28 19:54:29 2024 +0200 Added files from Pico sdk to gitignore commitec5e5cbf13Author: AlexanderHD27 <alexander@hal> Date: Sat Sep 14 21:09:50 2024 +0200 Create Marker for position Calibration commit58d31964b2Author: AlexanderHD27 <alexander@hal> Date: Wed Sep 11 23:32:55 2024 +0200 Upgrade to pico SDK 2.0.0
This commit is contained in:
177
common-libaries/mcp2521/include/bitfields.hpp
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177
common-libaries/mcp2521/include/bitfields.hpp
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#pragma once
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#include <cstdint>
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/**
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* @brief RXnBF PIN CONTROL AND STATUS REGISTER (ADDRESS: 0Ch)
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*
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*/
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struct BFPCTRL {
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uint8_t B0BFM : 1;
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uint8_t B1BFM : 1;
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uint8_t B0BFE : 1;
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uint8_t B1BFE : 1;
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uint8_t B0BFS : 1;
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uint8_t B1BFS : 1;
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uint8_t : 2;
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};
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/**
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* @brief TXnRTS PIN CONTROL AND STATUS REGISTER
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*
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*/
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struct TXRTSCTRL {
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uint8_t B0RTSM : 1;
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uint8_t B1RTSM : 1;
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uint8_t B2RTSM : 1;
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uint8_t B0RTS : 1;
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uint8_t B1RTS : 1;
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uint8_t B2RTS : 1;
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uint8_t : 2;
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};
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struct CANSTAT {
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uint8_t ICOD0 : ;
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uint8_t : 1;
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uint8_t OPMOD0 : 1;
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uint8_t OPMOD1 : 1;
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uint8_t OPMOD2 : 1;
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uint8_t : 1;
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};
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struct CANCTRL {
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uint8_t CLKPRE0 : 1;
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uint8_t CLKPRE1 : 1;
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uint8_t CLKEN : 1;
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uint8_t OSM : 1;
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uint8_t ABAT : 1;
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uint8_t REQOP0 : 1;
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uint8_t REQOP1 : 1;
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uint8_t REQOP2 : 1;
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};
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struct TEC {
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uint8_t TEC;
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};
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struct REC {
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uint8_t REC;
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};
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struct CNF3 {
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uint8_t PHSEG20 : 1;
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uint8_t PHSEG21 : 1;
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uint8_t PHSEG22 : 1;
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uint8_t : 3;
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uint8_t WAKFIL : 1;
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uint8_t SOF : 1;
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};
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struct CNF2 {
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uint8_t PRSEG0 : 1;
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uint8_t PRSEG1 : 1;
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uint8_t PRSEG2 : 1;
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uint8_t PHSEG10 : 1;
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uint8_t PHSEG11 : 1;
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uint8_t PHSEG12 : 1;
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uint8_t SAM : 1;
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uint8_t BTLMODE : 1;
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};
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struct CNF1 {
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uint8_t BRP0 : 1;
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uint8_t BRP1 : 1;
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uint8_t BRP2 : 1;
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uint8_t BRP3 : 1;
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uint8_t BRP4 : 1;
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uint8_t BRP5 : 1;
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uint8_t SJW0 : 1;
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uint8_t SJW1 : 1;
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};
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struct CANINTE {
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uint8_t RX0IE : 1;
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uint8_t RX1IE : 1;
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uint8_t TX0IE : 1;
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uint8_t TX1IE : 1;
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uint8_t TX2IE : 1;
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uint8_t ERRIE : 1;
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uint8_t WAKIE : 1;
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uint8_t MERRE : 1;
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};
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struct CANINTF {
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uint8_t RX0IF : 1;
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uint8_t RX1IF : 1;
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uint8_t TX0IF : 1;
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uint8_t TX1IF : 1;
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uint8_t TX2IF : 1;
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uint8_t ERRIF : 1;
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uint8_t WAKIF : 1;
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uint8_t MERRF : 1;
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};
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struct EFLG {
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uint8_t EWARN : 1;
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uint8_t RXWAR : 1;
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uint8_t TXWAR : 1;
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uint8_t RXEP : 1;
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uint8_t TXEP : 1;
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uint8_t TXBO : 1;
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uint8_t RX0OVR : 1;
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uint8_t RX1OVR : 1;
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};
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struct TXB0CTRL {
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uint8_t TXP0 : 1;
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uint8_t TXP1 : 1;
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uint8_t : 1;
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uint8_t TXREQ : 1;
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uint8_t TXERR : 1;
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uint8_t MLOA : 1;
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uint8_t ABTF : 1;
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uint8_t : 1;
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};
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struct TXB1CTRL {
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uint8_t TXP0 : 1;
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uint8_t TXP1 : 1;
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uint8_t : 1;
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uint8_t TXREQ : 1;
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uint8_t TXERR : 1;
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uint8_t MLOA : 1;
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uint8_t ABTF : 1;
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uint8_t : 1;
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};
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struct TXB2CTRL {
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uint8_t TXP0 : 1;
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uint8_t TXP1 : 1;
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uint8_t : 1;
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uint8_t TXREQ : 1;
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uint8_t TXERR : 1;
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uint8_t MLOA : 1;
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uint8_t ABTF : 1;
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uint8_t : 1;
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};
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struct RXB0CTRL {
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uint8_t FILHIT0 : 1;
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uint8_t BUKT1 : 1;
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uint8_t BUKT : 1;
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uint8_t RXRTR : 1;
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uint8_t : 1;
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uint8_t RXM0 : 1;
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uint8_t RXM1 : 1;
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uint8_t : 1;
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};
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struct RXB1CTRL {
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uint8_t FILHIT0 : 1;
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uint8_t FILHIT1 : 1;
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uint8_t FILHIT2 : 1;
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uint8_t RXRTR : 1;
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uint8_t : 1;
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uint8_t RXM0 : 1;
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uint8_t RXM1 : 1;
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uint8_t : 1;
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};
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