diff --git a/can-interface/a b/can-interface/a new file mode 100644 index 0000000..56a7847 --- /dev/null +++ b/can-interface/a @@ -0,0 +1,26 @@ + + + + txBuffer[0] = 0b00000011; // Read Instruction + txBuffer[1] = 0x0f; // CANCTRL Register Address + + spi_transaction_t transaction0 = { // RESET + .cmd = 0b11000000, + .length = 3 * 8, + .rxlength = 3 * 8, + .tx_buffer = txBuffer, + .rx_buffer = rxBuffer + }; + + spi_transaction_t transaction1 = { // READ STAT/S + .cmd = 0b10110000, + .length = 2 * 8, + .rxlength = 2 * 8, + .tx_buffer = txBuffer, + .rx_buffer = rxBuffer + }; + + + vTaskDelay(100 / portTICK_PERIOD_MS); + gpio_set_level(EXTERNAL_TRIGGER, false); + spi_device_transmit(mp2125_handle, &transaction0); \ No newline at end of file diff --git a/can-interface/components/mcp2125/CMakeLists.txt b/can-interface/components/mcp2125/CMakeLists.txt deleted file mode 100644 index 69ccdea..0000000 --- a/can-interface/components/mcp2125/CMakeLists.txt +++ /dev/null @@ -1,3 +0,0 @@ -idf_component_register(SRCS "operations.cpp" - INCLUDE_DIRS "include" - REQUIRES driver) \ No newline at end of file diff --git a/can-interface/components/mcp2125/include/mcp2125.hpp b/can-interface/components/mcp2125/include/mcp2125.hpp deleted file mode 100644 index 9490014..0000000 --- a/can-interface/components/mcp2125/include/mcp2125.hpp +++ /dev/null @@ -1,2 +0,0 @@ - -bool dummy_function(bool flag); \ No newline at end of file diff --git a/can-interface/components/mcp2521/CMakeLists.txt b/can-interface/components/mcp2521/CMakeLists.txt new file mode 100644 index 0000000..5e8012a --- /dev/null +++ b/can-interface/components/mcp2521/CMakeLists.txt @@ -0,0 +1,6 @@ +idf_component_register(SRCS "operations.cpp" + "spi_interface_init.cpp" + "spi_interface_commands.cpp" + "register_interface.cpp" + INCLUDE_DIRS "include" + REQUIRES driver) \ No newline at end of file diff --git a/can-interface/components/mcp2521/include/bitfields.hpp b/can-interface/components/mcp2521/include/bitfields.hpp new file mode 100644 index 0000000..bd9b674 --- /dev/null +++ b/can-interface/components/mcp2521/include/bitfields.hpp @@ -0,0 +1,177 @@ +#pragma once +#include + +/** + * @brief RXnBF PIN CONTROL AND STATUS REGISTER (ADDRESS: 0Ch) + * + */ +struct BFPCTRL { + uint8_t B0BFM : 1; + uint8_t B1BFM : 1; + uint8_t B0BFE : 1; + uint8_t B1BFE : 1; + uint8_t B0BFS : 1; + uint8_t B1BFS : 1; + uint8_t : 2; +}; + +/** + * @brief TXnRTS PIN CONTROL AND STATUS REGISTER + * + */ +struct TXRTSCTRL { + uint8_t B0RTSM : 1; + uint8_t B1RTSM : 1; + uint8_t B2RTSM : 1; + uint8_t B0RTS : 1; + uint8_t B1RTS : 1; + uint8_t B2RTS : 1; + uint8_t : 2; +}; + +struct CANSTAT { + uint8_t ICOD0 : ; + uint8_t : 1; + uint8_t OPMOD0 : 1; + uint8_t OPMOD1 : 1; + uint8_t OPMOD2 : 1; + uint8_t : 1; +}; + +struct CANCTRL { + uint8_t CLKPRE0 : 1; + uint8_t CLKPRE1 : 1; + uint8_t CLKEN : 1; + uint8_t OSM : 1; + uint8_t ABAT : 1; + uint8_t REQOP0 : 1; + uint8_t REQOP1 : 1; + uint8_t REQOP2 : 1; +}; + +struct TEC { + uint8_t TEC; +}; + +struct REC { + uint8_t REC; +}; + +struct CNF3 { + uint8_t PHSEG20 : 1; + uint8_t PHSEG21 : 1; + uint8_t PHSEG22 : 1; + uint8_t : 3; + uint8_t WAKFIL : 1; + uint8_t SOF : 1; +}; + +struct CNF2 { + uint8_t PRSEG0 : 1; + uint8_t PRSEG1 : 1; + uint8_t PRSEG2 : 1; + uint8_t PHSEG10 : 1; + uint8_t PHSEG11 : 1; + uint8_t PHSEG12 : 1; + uint8_t SAM : 1; + uint8_t BTLMODE : 1; +}; + +struct CNF1 { + uint8_t BRP0 : 1; + uint8_t BRP1 : 1; + uint8_t BRP2 : 1; + uint8_t BRP3 : 1; + uint8_t BRP4 : 1; + uint8_t BRP5 : 1; + uint8_t SJW0 : 1; + uint8_t SJW1 : 1; +}; + +struct CANINTE { + uint8_t RX0IE : 1; + uint8_t RX1IE : 1; + uint8_t TX0IE : 1; + uint8_t TX1IE : 1; + uint8_t TX2IE : 1; + uint8_t ERRIE : 1; + uint8_t WAKIE : 1; + uint8_t MERRE : 1; +}; + +struct CANINTF { + uint8_t RX0IF : 1; + uint8_t RX1IF : 1; + uint8_t TX0IF : 1; + uint8_t TX1IF : 1; + uint8_t TX2IF : 1; + uint8_t ERRIF : 1; + uint8_t WAKIF : 1; + uint8_t MERRF : 1; +}; + +struct EFLG { + uint8_t EWARN : 1; + uint8_t RXWAR : 1; + uint8_t TXWAR : 1; + uint8_t RXEP : 1; + uint8_t TXEP : 1; + uint8_t TXBO : 1; + uint8_t RX0OVR : 1; + uint8_t RX1OVR : 1; +}; + +struct TXB0CTRL { + uint8_t TXP0 : 1; + uint8_t TXP1 : 1; + uint8_t : 1; + uint8_t TXREQ : 1; + uint8_t TXERR : 1; + uint8_t MLOA : 1; + uint8_t ABTF : 1; + uint8_t : 1; +}; + +struct TXB1CTRL { + uint8_t TXP0 : 1; + uint8_t TXP1 : 1; + uint8_t : 1; + uint8_t TXREQ : 1; + uint8_t TXERR : 1; + uint8_t MLOA : 1; + uint8_t ABTF : 1; + uint8_t : 1; +}; + +struct TXB2CTRL { + uint8_t TXP0 : 1; + uint8_t TXP1 : 1; + uint8_t : 1; + uint8_t TXREQ : 1; + uint8_t TXERR : 1; + uint8_t MLOA : 1; + uint8_t ABTF : 1; + uint8_t : 1; +}; + +struct RXB0CTRL { + uint8_t FILHIT0 : 1; + uint8_t BUKT1 : 1; + uint8_t BUKT : 1; + uint8_t RXRTR : 1; + uint8_t : 1; + uint8_t RXM0 : 1; + uint8_t RXM1 : 1; + uint8_t : 1; +}; + +struct RXB1CTRL { + uint8_t FILHIT0 : 1; + uint8_t FILHIT1 : 1; + uint8_t FILHIT2 : 1; + uint8_t RXRTR : 1; + uint8_t : 1; + uint8_t RXM0 : 1; + uint8_t RXM1 : 1; + uint8_t : 1; +}; diff --git a/can-interface/components/mcp2521/include/mcp2521.hpp b/can-interface/components/mcp2521/include/mcp2521.hpp new file mode 100644 index 0000000..080e5ed --- /dev/null +++ b/can-interface/components/mcp2521/include/mcp2521.hpp @@ -0,0 +1,98 @@ +#pragma once +#include "reg.hpp" + +#include + +#include "driver/gpio.h" +#include "driver/spi_master.h" + +bool dummy_function(bool flag); + + +enum MCP2521_RX_BUFFER { + RXB0 = 0, + RXB1 = 1 +}; + +enum MCP2521_TX_BUFFER { + TXB0 = 0, + TXB1 = 1, + TXB2 = 2 +}; + +enum MCP2521_BUFFER_TYPE { + ID = 0, + DATA = 1 +}; + +class MCP2521_SPI_Interface { +private: + char spi_rx_buffer[32]; + char spi_tx_buffer[32]; + + spi_bus_config_t * spi_bus_config; + spi_device_interface_config_t spi_device_config; + spi_device_handle_t spi_device_handle; + +public: + spi_bus_config_t * getSPI_bus_config(); + + MCP2521_SPI_Interface( + spi_host_device_t spi_host, + spi_bus_config_t *bus_config, + gpio_num_t mosi, + gpio_num_t miso, + gpio_num_t sclk, + gpio_num_t cs, + gpio_num_t int_pin + ); + MCP2521_SPI_Interface( + spi_host_device_t spi_host, + spi_bus_config_t *bus_config, + gpio_num_t cs, + gpio_num_t int_pin + ); + + ~MCP2521_SPI_Interface(); + + static void initSPIBus( + spi_host_device_t spi_host, + gpio_num_t mosi, + gpio_num_t miso, + gpio_num_t sclk, + spi_bus_config_t *bus_config + ); + + void initSPIDevice( + spi_host_device_t spi_host, + gpio_num_t cs + ); + + void deinitSPI(); + + void initPins( + gpio_num_t int_pin + ); + void deinitPins(); + + void reset(); + + void read_reg(uint8_t address, uint8_t *data, size_t length); + uint8_t read_reg(uint8_t address); + + void read_rx_buf(MCP2521_RX_BUFFER buffer, MCP2521_BUFFER_TYPE type, uint8_t *data, size_t length); + + void write_reg(uint8_t address, uint8_t *data, size_t length); + void write_reg(uint8_t address, uint8_t data); + + void write_tx_buf(MCP2521_TX_BUFFER buffer, MCP2521_BUFFER_TYPE type, uint8_t *data, size_t length); + + void request_to_send(bool txb2, bool txb1, bool txb0); + void request_to_send(MCP2521_TX_BUFFER buffer); + + uint8_t read_status(); + uint8_t read_rx_status(); + + void bit_modify(uint8_t address, uint8_t mask, uint8_t data); +}; + diff --git a/can-interface/components/mcp2521/include/reg.hpp b/can-interface/components/mcp2521/include/reg.hpp new file mode 100644 index 0000000..40d82bb --- /dev/null +++ b/can-interface/components/mcp2521/include/reg.hpp @@ -0,0 +1,146 @@ +#pragma once + +#define MCP2521_BFPCTRL 0x0C +#define MCP2521_BFPCTRL_B1BFS (1 << 5) +#define MCP2521_BFPCTRL_B0BFS (1 << 4) +#define MCP2521_BFPCTRL_B1BFE (1 << 3) +#define MCP2521_BFPCTRL_B0BFE (1 << 2) +#define MCP2521_BFPCTRL_B1BFM (1 << 1) +#define MCP2521_BFPCTRL_B0BFM (1 << 0) + +#define MCP2521_TXRTSCTRL 0x0D +#define MCP2521_TXRTSCTRL_B2RTS (1 << 5) +#define MCP2521_TXRTSCTRL_B1RTS (1 << 4) +#define MCP2521_TXRTSCTRL_B0RTS (1 << 3) +#define MCP2521_TXRTSCTRL_B2RTSM (1 << 2) +#define MCP2521_TXRTSCTRL_B1RTSM (1 << 1) +#define MCP2521_TXRTSCTRL_B0RTSM (1 << 0) + +#define MCP2521_CANSTAT 0x0E +#define MCP2521_CANSTAT_OPMOD2 (1 << 7) +#define MCP2521_CANSTAT_OPMOD1 (1 << 6) +#define MCP2521_CANSTAT_OPMOD0 (1 << 5) +#define MCP2521_CANSTAT_ICOD2 (1 << 3) +#define MCP2521_CANSTAT_ICOD1 (1 << 2) +#define MCP2521_CANSTAT_ICOD0 (1 << 1) + +#define MCP2521_CANCTRL 0x0F +#define MCP2521_CANCTRL_REQOP2 (1 << 7) +#define MCP2521_CANCTRL_REQOP1 (1 << 6) +#define MCP2521_CANCTRL_REQOP0 (1 << 5) +#define MCP2521_CANCTRL_ABAT (1 << 4) +#define MCP2521_CANCTRL_OSM (1 << 3) +#define MCP2521_CANCTRL_CLKEN (1 << 2) +#define MCP2521_CANCTRL_CLKPRE1 (1 << 1) +#define MCP2521_CANCTRL_CLKPRE0 (1 << 0) + +#define MCP2521_TEC 0x1C + +#define MCP2521_REC 0x1D + +#define MCP2521_CNF3 0x28 +#define MCP2521_CNF3_SOF (1 << 7) +#define MCP2521_CNF3_WAKFIL (1 << 6) +#define MCP2521_CNF3_PHSEG22 (1 << 2) +#define MCP2521_CNF3_PHSEG21 (1 << 1) +#define MCP2521_CNF3_PHSEG20 (1 << 0) + +#define MCP2521_CNF2 0x29 +#define MCP2521_CNF2_BTLMODE (1 << 7) +#define MCP2521_CNF2_SAM (1 << 6) +#define MCP2521_CNF2_PHSEG12 (1 << 5) +#define MCP2521_CNF2_PHSEG11 (1 << 4) +#define MCP2521_CNF2_PHSEG10 (1 << 3) +#define MCP2521_CNF2_PRSEG2 (1 << 2) +#define MCP2521_CNF2_PRSEG1 (1 << 1) +#define MCP2521_CNF2_PRSEG0 (1 << 0) + +#define MCP2521_CNF1 0x2A +#define MCP2521_CNF1_SJW1 (1 << 7) +#define MCP2521_CNF1_SJW0 (1 << 6) +#define MCP2521_CNF1_BRP5 (1 << 5) +#define MCP2521_CNF1_BRP4 (1 << 4) +#define MCP2521_CNF1_BRP3 (1 << 3) +#define MCP2521_CNF1_BRP2 (1 << 2) +#define MCP2521_CNF1_BRP1 (1 << 1) +#define MCP2521_CNF1_BRP0 (1 << 0) + +#define MCP2521_CANINTE 0x2B +#define MCP2521_CANINTE_MERRE (1 << 7) +#define MCP2521_CANINTE_WAKIE (1 << 6) +#define MCP2521_CANINTE_ERRIE (1 << 5) +#define MCP2521_CANINTE_TX2IE (1 << 4) +#define MCP2521_CANINTE_TX1IE (1 << 3) +#define MCP2521_CANINTE_TX0IE (1 << 2) +#define MCP2521_CANINTE_RX1IE (1 << 1) +#define MCP2521_CANINTE_RX0IE (1 << 0) + +#define MCP2521_CANINTF 0x2C +#define MCP2521_CANINTF_MERRF (1 << 7) +#define MCP2521_CANINTF_WAKIF (1 << 6) +#define MCP2521_CANINTF_ERRIF (1 << 5) +#define MCP2521_CANINTF_TX2IF (1 << 4) +#define MCP2521_CANINTF_TX1IF (1 << 3) +#define MCP2521_CANINTF_TX0IF (1 << 2) +#define MCP2521_CANINTF_RX1IF (1 << 1) +#define MCP2521_CANINTF_RX0IF (1 << 0) + +#define MCP2521_EFLG 0x2D +#define MCP2521_EFLG_RX1OVR (1 << 7) +#define MCP2521_EFLG_RX0OVR (1 << 6) +#define MCP2521_EFLG_TXBO (1 << 5) +#define MCP2521_EFLG_TXEP (1 << 4) +#define MCP2521_EFLG_RXEP (1 << 3) +#define MCP2521_EFLG_TXWAR (1 << 2) +#define MCP2521_EFLG_RXWAR (1 << 1) +#define MCP2521_EFLG_EWARN (1 << 0) + +#define MCP2521_TXB0CTRL 0x30 +#define MCP2521_TXB0CTRL_ABTF (1 << 6) +#define MCP2521_TXB0CTRL_MLOA (1 << 5) +#define MCP2521_TXB0CTRL_TXERR (1 << 4) +#define MCP2521_TXB0CTRL_TXREQ (1 << 3) +#define MCP2521_TXB0CTRL_TXP1 (1 << 1) +#define MCP2521_TXB0CTRL_TXP0 (1 << 0) + +#define MCP2521_TXB1CTRL 0x40 +#define MCP2521_TXB1CTRL_ABTF (1 << 6) +#define MCP2521_TXB1CTRL_MLOA (1 << 5) +#define MCP2521_TXB1CTRL_TXERR (1 << 4) +#define MCP2521_TXB1CTRL_TXREQ (1 << 3) +#define MCP2521_TXB1CTRL_TXP1 (1 << 1) +#define MCP2521_TXB1CTRL_TXP0 (1 << 0) + +#define MCP2521_TXB2CTRL 0x50 +#define MCP2521_TXB2CTRL_ABTF (1 << 6) +#define MCP2521_TXB2CTRL_MLOA (1 << 5) +#define MCP2521_TXB2CTRL_TXERR (1 << 4) +#define MCP2521_TXB2CTRL_TXREQ (1 << 3) +#define MCP2521_TXB2CTRL_TXP1 (1 << 1) +#define MCP2521_TXB2CTRL_TXP0 (1 << 0) + +#define MCP2521_RXB0CTRL 0x60 +#define MCP2521_RXB0CTRL_RXM1 (1 << 6) +#define MCP2521_RXB0CTRL_RXM0 (1 << 5) +#define MCP2521_RXB0CTRL_RXRTR (1 << 3) +#define MCP2521_RXB0CTRL_BUKT (1 << 2) +#define MCP2521_RXB0CTRL_BUKT1 (1 << 1) +#define MCP2521_RXB0CTRL_FILHIT0 (1 << 0) + +#define MCP2521_RXB1CTRL 0x70 +#define MCP2521_RXB1CTRL_RXM1 (1 << 6) +#define MCP2521_RXB1CTRL_RXM0 (1 << 5) +#define MCP2521_RXB1CTRL_RXRTR (1 << 3) +#define MCP2521_RXB1CTRL_FILHIT2 (1 << 2) +#define MCP2521_RXB1CTRL_FILHIT1 (1 << 1) +#define MCP2521_RXB1CTRL_FILHIT0 (1 << 0) + +#define MCP2521_OP_RESET 0b11000000 +#define MCP2521_OP_READ 0b00000011 +#define MCP2521_OP_READ_RX_BUFFER 0b10010000 +#define MCP2521_OP_WRITE 0b00000010 +#define MCP2521_OP_LOAD_TX_BUFFER 0b01000000 +#define MCP2521_OP_RTS 0b10000000 +#define MCP2521_OP_READ_STATUS 0b10100000 +#define MCP2521_OP_RX_STATUS 0b10110000 +#define MCP2521_OP_BIT_MODIFY 0b00000101 \ No newline at end of file diff --git a/can-interface/components/mcp2521/include/register_interface.hpp b/can-interface/components/mcp2521/include/register_interface.hpp new file mode 100644 index 0000000..cf22da7 --- /dev/null +++ b/can-interface/components/mcp2521/include/register_interface.hpp @@ -0,0 +1,10 @@ +#pragma once +#include + +class MCP2515 { + private: + + public: + uint8_t get_TransmitErrorCounter(); + uint8_t get_ReceiveErrorCounter(); +}; \ No newline at end of file diff --git a/can-interface/components/mcp2125/operations.cpp b/can-interface/components/mcp2521/operations.cpp similarity index 100% rename from can-interface/components/mcp2125/operations.cpp rename to can-interface/components/mcp2521/operations.cpp diff --git a/can-interface/components/mcp2521/register_interface.cpp b/can-interface/components/mcp2521/register_interface.cpp new file mode 100644 index 0000000..b6147bf --- /dev/null +++ b/can-interface/components/mcp2521/register_interface.cpp @@ -0,0 +1,2 @@ +#include "mcp2515.hpp" +#include "register_interface.hpp" diff --git a/can-interface/components/mcp2521/spi_interface_commands.cpp b/can-interface/components/mcp2521/spi_interface_commands.cpp new file mode 100644 index 0000000..33cd7c7 --- /dev/null +++ b/can-interface/components/mcp2521/spi_interface_commands.cpp @@ -0,0 +1,49 @@ +#include + +#include "mcp2521.hpp" +#include "reg.hpp" + +void MCP2521_SPI_Interface::reset() { + spi_transaction_ext_t t = { + .base = { + .flags = SPI_TRANS_VARIABLE_CMD | SPI_TRANS_VARIABLE_ADDR, + .cmd = MCP2521_OP_RESET, + .addr = 8, + .length = 0, + .rxlength = 0, + .tx_buffer = NULL, + .rx_buffer = NULL + }, + .command_bits = 8, + .address_bits = 0, + .dummy_bits = 0, + }; + + spi_device_transmit(this->spi_device_handle, (spi_transaction_t*)(&t)); +} + +void MCP2521_SPI_Interface::read_reg(uint8_t address, uint8_t *data, size_t length) { + spi_transaction_ext_t t = { + .base = { + .flags = SPI_TRANS_VARIABLE_CMD | SPI_TRANS_VARIABLE_ADDR, + .cmd = MCP2521_OP_READ, + .addr = address, + .length = 8 * length, + .rxlength = 8 * length, + .tx_buffer = &this->spi_tx_buffer, + .rx_buffer = &this->spi_rx_buffer, + }, + .command_bits = 8, + .address_bits = 8, + .dummy_bits = 0, + }; + + spi_device_transmit(this->spi_device_handle, (spi_transaction_t*)(&t)); + memcpy(data, this->spi_rx_buffer, length); +} + +uint8_t MCP2521_SPI_Interface::read_reg(uint8_t address) { + uint8_t data; + read_reg(address, &data, 1); + return data; +} \ No newline at end of file diff --git a/can-interface/components/mcp2521/spi_interface_init.cpp b/can-interface/components/mcp2521/spi_interface_init.cpp new file mode 100644 index 0000000..c33d9a9 --- /dev/null +++ b/can-interface/components/mcp2521/spi_interface_init.cpp @@ -0,0 +1,99 @@ +#include "mcp2521.hpp" +#include +#include + +#include "driver/gpio.h" +#include "driver/spi_master.h" + +MCP2521_SPI_Interface::MCP2521_SPI_Interface( + spi_host_device_t spi_host, + spi_bus_config_t *bus_config, + gpio_num_t mosi, + gpio_num_t miso, + gpio_num_t sclk, + gpio_num_t cs, + gpio_num_t int_pin +) { + initPins(int_pin); + initSPIBus(spi_host, mosi, miso, sclk, bus_config); + this->spi_bus_config = bus_config; + initSPIDevice(spi_host, cs); +} + +MCP2521_SPI_Interface::MCP2521_SPI_Interface( + spi_host_device_t spi_host, + spi_bus_config_t *bus_config, + gpio_num_t cs, + gpio_num_t int_pin +) { + initPins(int_pin); + this->spi_bus_config = bus_config; + initSPIDevice(spi_host, cs); +} + +void MCP2521_SPI_Interface::initSPIBus( + spi_host_device_t spi_host, + gpio_num_t mosi, + gpio_num_t miso, + gpio_num_t sclk, + spi_bus_config_t *bus_config +) { + memset(bus_config, 0, sizeof(spi_bus_config_t)); + bus_config->mosi_io_num = mosi; + bus_config->miso_io_num = miso; + bus_config->sclk_io_num = sclk; + + bus_config->quadwp_io_num = -1; + bus_config->quadhd_io_num = -1; + + bus_config->flags = SPICOMMON_BUSFLAG_MASTER; + spi_bus_initialize(spi_host, bus_config, SPI_DMA_CH_AUTO); +} + +void MCP2521_SPI_Interface::initSPIDevice( + spi_host_device_t spi_host, + gpio_num_t cs +) { + memset(&this->spi_device_config, 0, sizeof(spi_device_interface_config_t)); + this->spi_device_config = { + .command_bits = 8, + .address_bits = 0, + .dummy_bits = 0, + + .mode = 0, + .duty_cycle_pos = 128, + // cs_ena_pretrans = 0 and cs_ena_posttrans = 0 need to be set to zero, if not its not compatible with full-duplex mode + // Learned this the hard way + .cs_ena_pretrans = 0, + .cs_ena_posttrans = 0, + .clock_speed_hz = 10000, + + .spics_io_num = cs, + .flags = SPI_DEVICE_NO_DUMMY, + .queue_size = 5, + }; + + spi_bus_add_device(spi_host, &this->spi_device_config, &this->spi_device_handle); + + memset(&this->spi_tx_buffer, 0, sizeof(this->spi_tx_buffer)); + memset(&this->spi_rx_buffer, 0, sizeof(this->spi_rx_buffer)); +} + +spi_bus_config_t * MCP2521_SPI_Interface::getSPI_bus_config() { + return this->spi_bus_config; +} + +MCP2521_SPI_Interface::~MCP2521_SPI_Interface() { + deinitSPI(); + deinitPins(); +} + +void MCP2521_SPI_Interface::initPins(gpio_num_t int_pin) { + +} + +void MCP2521_SPI_Interface::deinitPins() { + + +} + diff --git a/can-interface/main/CMakeLists.txt b/can-interface/main/CMakeLists.txt index 5198818..89d9047 100755 --- a/can-interface/main/CMakeLists.txt +++ b/can-interface/main/CMakeLists.txt @@ -1,5 +1,5 @@ idf_component_register(SRCS "hello_world_main.cpp" REQUIRES driver - REQUIRES mcp2125 + REQUIRES mcp2521 REQUIRES spi_flash INCLUDE_DIRS "") diff --git a/can-interface/main/hello_world_main.cpp b/can-interface/main/hello_world_main.cpp index db34804..e071ae4 100755 --- a/can-interface/main/hello_world_main.cpp +++ b/can-interface/main/hello_world_main.cpp @@ -5,6 +5,7 @@ */ #include +#include #include #include "sdkconfig.h" @@ -20,12 +21,14 @@ #include "driver/gpio.h" #include "driver/spi_master.h" -#include "mcp2125.hpp" +#include "mcp2521.hpp" +#include "reg.hpp" #define SPI_PIN_CS0 GPIO_NUM_5 #define SPI_PIN_SCLK GPIO_NUM_18 #define SPI_PIN_MISO GPIO_NUM_19 #define SPI_PIN_MOSI GPIO_NUM_23 +#define CAN_INT_PIN GPIO_NUM_21 #define EXTERNAL_TRIGGER GPIO_NUM_26 @@ -42,61 +45,35 @@ void app_main() { gpio_set_direction(EXTERNAL_TRIGGER, GPIO_MODE_OUTPUT); gpio_set_level(EXTERNAL_TRIGGER, true); - spi_bus_config_t spi_config = { - .mosi_io_num = SPI_PIN_MOSI, - .miso_io_num = SPI_PIN_MISO, - .sclk_io_num = SPI_PIN_SCLK, - - .quadwp_io_num = -1, - .quadhd_io_num = -1, - - .flags = SPICOMMON_BUSFLAG_MASTER - }; - - spi_device_interface_config_t mp2125_devcfg = { - .command_bits = 8, - .address_bits = 0, - .dummy_bits = 0, - - .mode = 0, - .duty_cycle_pos = 128, - .cs_ena_pretrans = 1, - .cs_ena_posttrans = 1, - .clock_speed_hz = 10000, - - .spics_io_num = SPI_PIN_CS0, - .flags = SPI_DEVICE_HALFDUPLEX, - .queue_size = 5, - }; - - spi_device_handle_t mp2125_handle; - - spi_bus_initialize(VSPI_HOST, &spi_config, SPI_DMA_CH_AUTO); - spi_bus_add_device(VSPI_HOST, &mp2125_devcfg, &mp2125_handle); - - char rxBuffer[32] = {0}; - - spi_transaction_t transaction0 = { // RESET - .cmd = 0b11000000, - .length = 0, - .rxlength = 2 * 8, - .tx_buffer = NULL, - .rx_buffer = rxBuffer - }; - - spi_transaction_t transaction1 = { // READ STAT/S - .cmd = 0b10110000, - .length = 0, - .rxlength = 2 * 8, - .tx_buffer = NULL, - .rx_buffer = rxBuffer - }; - - vTaskDelay(100 / portTICK_PERIOD_MS); gpio_set_level(EXTERNAL_TRIGGER, false); - spi_device_transmit(mp2125_handle, &transaction0); - spi_device_transmit(mp2125_handle, &transaction1); + + spi_bus_config_t spi_bus; + + MCP2521_SPI_Interface mcp2521_spi( + VSPI_HOST, + &spi_bus, + SPI_PIN_MOSI, + SPI_PIN_MISO, + SPI_PIN_SCLK, + SPI_PIN_CS0, + CAN_INT_PIN + ); + + mcp2521_spi.reset(); + printf("%x\n", mcp2521_spi.read_reg(MCP2521_CANCTRL)); + + uint8_t data[16]; + mcp2521_spi.read_reg(MCP2521_CANSTAT, data, 16); + + for(int i=0; i<0x10; i++) { + printf("%x ", i); + for(int j=0; j<8; j++) { + printf("%u", (data[i] >> (7-j)) & 1); + } + printf("\n"); + } + gpio_set_level(EXTERNAL_TRIGGER, true); bool flag = true; diff --git a/can-interface/pulseview-session b/can-interface/pulseview-session new file mode 100644 index 0000000..5cb535f Binary files /dev/null and b/can-interface/pulseview-session differ